TMP5X5T1M: A Configurable Binary Morphological and Template Matching Processor
نویسندگان
چکیده
A configurable chip for binary morpholpgical and temolate m a t c h o~erations is presented here. The chip was designed based on FPGA design methodologies and fabricated in 0.8 ,um CMOS Gate Array technology. The TMPSXSTIM is able to process maximum 1024x1024 pixels binary image with 5x5 template size in a speed of 200 ns per pixel at I0 MHz clock rates. Two or more processors can be configured into 4 parallel confi-atrations make this processor able to perform a broad range of morphological and template matching operations.
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